Vertical Semiconductor Gets $73M CHIPS Letter of Intent for GaN Power

Vertical Semiconductor, an MIT spinout, signed a letter of intent with the U.S. Department of Commerce for up to $73 million in CHIPS and Science Act incentives to develop vertical gallium nitride (GaN) power transistors, the company said on October 22, 2026.

The money would go to research and development of vertical GaN FinFET power transistors aimed at AI data centers and energy infrastructure. The company's goal is a first-of-its-kind 2.5 MW AI rack that it says would cut energy losses by 30% and shrink its physical footprint by 50%. Those are company targets: its release gives no baseline for them, and Commerce's release does not mention them.

Power conversion is where this matters for data-center capacity. Cynthia Liao, the company's CEO and co-founder, said power is the most significant bottleneck in the build-out of AI infrastructure. The company says broad adoption of vertical GaN would open up more compute capacity on the same grid connection. It has published no device data to back that or the footprint target.

What Commerce Is Offering

The letter of intent is with the CHIPS Research and Development Office. Vertical is one of four companies in a package of up to $389 million, according to Converge Digest. The others are Helion (up to $175 million), Commonwealth Fusion Systems (up to $85 million) and Sibelco (up to $56 million). This is separate from the seven-company, $874 million set of letters of intent Commerce announced in July.

Commerce said in its release that it will receive a minority, non-controlling and non-voting equity stake in each company as a condition for making the awards. Stake sizes and valuation terms have not been disclosed. Commerce Secretary Howard Lutnick said the investment expands domestic research and secures critical supply chains.

Why Higher Voltage Matters for AI Racks

Today's AI racks distribute power at 54 V DC inside the rack, NVIDIA says. At the same power, a higher voltage means less current, so the same conductor can carry more power. NVIDIA's 800 V DC design converts grid power once, at the data center perimeter, and steps it down inside the rack.

Every conversion step turns some energy into heat, which is where power transistors matter. Converge Digest's analysis says Vertical Semiconductor positions its devices for 800 VDC; the company has not said so itself. Its 2.5 MW rack is a development goal, set against the 227 kW NVIDIA lists for a Vera Rubin NVL72 rack in its MaxP mode.

The Company Behind the Vertical GaN Bet

Vertical Semiconductor was spun out of MIT in 2024 and is based in Cambridge, Massachusetts, according to Semiconductor Today. The original technology was invented with support from ARPA-E. Converge Digest names Prof. Tomas Palacios as a co-founder and advisor. Voltgrid News reported earlier on Infineon's NVIDIA 800 VDC work with GaN. The company's release gives no voltage rating or wafer size for these parts.

The work would be led by Vertical with unnamed commercial partners, and the stated goal includes domestic production.

What Is Not Confirmed Yet

This is a letter of intent, not a final award. The incentives are described as proposed, and Sibelco, one of the four companies, lists due diligence, negotiations and government approvals as outstanding steps; Vertical's release does not give conditions. No schedule or milestones have been published for the R&D or for the 2.5 MW rack demonstration, and no demonstration has been reported as completed.

Watch for the definitive agreement, the size of the Commerce stake, and the first device data. Until the company releases device figures, the 30% and 50% targets remain unverified claims.